The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a solder provided on a connecting pad of a wiring board and a metal bump provided on an electrode pad of a semiconductor chip are bonded to flip chip connect the semiconductor chip to the wiring board.
Besides, for example, an Au bump or a Cu bump are used as the metal bump.
In some conventional semiconductor devices, a solder provided on a connecting pad of a wiring board and a metal bump provided on an electrode pad of a semiconductor chip are bonded to flip chip connect the semiconductor chip to the wiring board (see FIG. 1).
FIG. 1 is a sectional view showing the conventional semiconductor device.
With reference to FIG. 1, a conventional semiconductor device 100 comprises a wiring board 101, a semiconductor chip 102, a metal bump 103, a solder 104, an underfill resin 105, and a solder ball 115.
The wiring board 101 has a board body 106, a via 107, a connecting pad 108, solder resists 109 and 114, a wiring 110, and a pad 112.
The board body 106 is a core substrate. As the board body 106, it is possible to use a glass epoxy resin or a tape-like resin, for example.
The via 107 is provided to penetrate through the board body 106. The connecting pad 108 is provided on an upper surface 106A of the board body 106 in a corresponding portion to a position in which the via 107 is formed. The connecting pad 108 is connected to the via 107.
The solder resist 109 is provided on the upper surface 106A of the board body 106 to expose the connecting pad 108. The wiring 110 is provided on a lower surface 106B of the board body 106 in a corresponding portion of the position in which the via 107 is formed. The wiring 110 is connected to the via 107. Consequently, the wiring 110 is electrically connected to the connecting pad 108 through the via 107.
The pad 112 is provided on the lower surface 106B of the board body 106. The pad 112 is connected to the wiring 110. The solder resist 114 is provided on the lower surface 106B of the board body 106 to expose the pad 112.
The semiconductor chip 102 has a plurality of electrode pads 116. The electrode pads 116 are electrically connected to an integrated circuit provided on the semiconductor chip 102. As a material of the electrode pad 116, it is possible to use A1, for example.
The metal bump 103 is provided on the electrode pads 116. The metal bump 103 is provided in contact with the connecting pad 108. Consequently, the semiconductor chip 102 is electrically connected to the connecting pad 108 through the metal bump 103.
The solder 104 is provided on the connecting pad 108. The solder 104 serves to fix the metal bump 103 onto the connecting pad 108. As the solder 104, it is possible to use an Sn solder or an Sn based alloy solder which is formed by a nonelectrolytic plating method, for example. The solder 104 formed by a plating method as well as the nonelectrolytic plating method includes a large number of fine voids. In the case in which the Sn solder or the Sn based alloy solder is used as the solder 104, it is preferable that a thickness should be equal to or smaller than 1 μm, for example. By reducing the thickness of the solder 104, thus, it is possible to prevent the Sn contained in the solder 104 having the fine voids from being diffused into the electrode pad 116 through the metal bump 103, resulting in a non-conduction between the electrode pad 116 and the metal bump 103 in a heat treatment in a formation of the solder ball 115 (a heating temperature is approximately 230° C. to 260° C.) or a high temperature inspection of the semiconductor device 100.
The underfill resin 105 is provided to fill a clearance between the semiconductor chip 102 and the wiring board 101. The underfill resin 105 serves to compensate for a connecting strength between the semiconductor chip 102 and the wiring board 101.
The solder ball 115 is provided on the pad 112 of the wiring board 101. The solder ball 115 is an external connecting terminal for electrically connecting a mounting board (not shown) such as a mother board and the semiconductor device 100.
FIGS. 2 to 7 are views showing a process for manufacturing the conventional semiconductor device.
With reference to FIGS. 2 to 7, description will be given to a method of manufacturing the conventional semiconductor device 100. First of all, at a step shown in FIG. 2, the wiring board 101 is formed by a well-known technique. At a step shown in FIG. 3, subsequently, the solder 104 is formed on at least the upper surface of the connecting pad 108 by a nonelectrolytic plating method. A thickness of the solder 104 is set to be equal to or smaller than 1 μm. For the solder 104, for example, an Sn solder or an Sn based alloy solder is used.
At a step shown in FIG. 4, next, the metal bump 103 is formed on the electrode pads 106 provided on the semiconductor chip 102. At a step shown in FIG. 5, then, a high pressure is applied to cause the metal bump 103 to come in contact with the connecting pad 108. Thereafter, the solder 104 is subjected to a reflow. Thus, the connecting pad 108 and the metal bump 103 are electrically connected to each other.
At a step shown in FIG. 6, next, the underfill resin 105 is formed to fill the clearance between the semiconductor chip 102 and the wiring board 101 by a capillarity.
At a step shown in FIG. 7, subsequently, the solder ball 115 is formed on the pad 112 of the wiring board 101 in a state in which the structure shown in FIG. 6 is heated. Consequently, there is manufactured the semiconductor device 100 in which the semiconductor chip 102 and the wiring board 101 are flip chip connected to each other (for example, see Patent Document 1) [Patent Document 1] JP-A-8-148496
In the conventional semiconductor device 100, however, the solder 104 having a small thickness (1 μm or less) is formed on the connecting pad 108 and is bonded to the metal bump 103. For this reason, there is a problem in that the bonding portion of the solder 104 and the metal bump 103 is broken, resulting in a deterioration in an electrical connecting reliability between the wiring board 101 and the semiconductor chip 102 due to a difference in a coefficient of thermal expansion between the wiring board 101 and the semiconductor chip 102 when a temperature of the solder 104 subjected to the reflow is lowered to a room temperature.
In the case in which a material of the substrate body 106 is soft (for example, a tape-like resin) or the case in which the structure of the electrode pad 116 is fragile, moreover, it is hard to cause the metal bump 103 to come in contact with the connecting pad 108 in a state in which a high pressure is applied. Therefore, there is a problem in that the electrical connecting reliability between the wiring board 101 and the semiconductor chip 102 is deteriorated.
In the case in which there is a variation in a height between the metal bumps 103 or the case in which a warpage is generated on the wiring board 101, furthermore, the solder 104 does not come in contact with the metal bump 103. For this reason, there is a problem in that the metal bump 103 cannot be electrically connected to the connecting pad 108.